A continuing trend in the electronics industry is the miniaturization of electronic circuits, and the drive toward higher and higher circuit element density. On conventional printed wiring boards today, a large fraction of the surface area is occupied by surface-mounted capacitors and other passive devices. The industry has recognized that one way to further increase circuit element density is to eliminate surface-mounted passives and embed or integrate passive structures in the circuit boards themselves. This has the added advantage of placing the capacitors much closer to the active components, thus reducing electrical lead length and lead inductance, thereby improving circuit speed and reducing signal noise. Examples of embedded or integrated capacitor articles are disclosed in U.S. Pat. Nos. 5,010,641; 5,027,253; 5,079,069; 5,155,655; 5,161,086; 5,162,977; 5,261,153; 5,469,324; 5,701,032; 5,745,334; and 5,796,587.
A basic capacitor construction consists of two electrically conductive electrodes separated by a thin layer of electrically insulating dielectric material. In present embedded capacitor technologies, the dielectric material is typically an anodized or sputter-deposited metal oxide, such as tantalum oxide, or a high dielectric constant ceramic, such as barium titanate, dispersed in a matrix of some thermally and mechanically stable polymer, such as an epoxy.
It is known that for the polymer-based capacitors to have satisfactory mechanical strength and interlayer adhesion, the metal electrodes must have rough surfaces. These rough surfaces limit the minimum thickness possible without creating short circuits ("shorts") and high leakage currents across the capacitor structure, since otherwise, random protrusions on the two facing electrode surfaces could bridge the gap across the dielectric layer and make contact.
Capacitance, C, of a parallel plate capacitor is given by the equation: C=KA/4.lambda.d, where K represents the dielectric constant of the medium between the plates, A represents the area of the plates, and d represents the distance between the plates. Accordingly, capacitance per unit area (measured typically in nF/cm.sup.2) can only be increased by reducing the dielectric layer thickness (electrode spacing) of the capacitor or increasing the dielectric constant of the dielectric material between the conductive electrodes. Thus, it was believed that a higher capacitance per unit area, which is increasingly required for modern high frequency, high speed circuits, could only be achieved in polymer-based capacitors by using dielectrics with unusually high dielectric constants.
It is well known that capacitors can be formed by placing a layer of a high dielectric constant ceramic dispersed in an organic polymer between two conductive electrode sheets, e.g., barium titanate in epoxy between copper foils. Such capacitor sheets or laminates can be used as a layer in printed wiring boards and multichip modules to replace surface mounted discrete capacitors. Such capacitor sheets are currently sold; however, they have low capacitance (typically less than 1 nF/cm.sup.2) which limits their usefulness. Two well known ways of increasing the capacitance of such a laminate are to decrease the coating thickness and to increase the dielectric constant. To be useful, coating thicknesses typically need to be in range of 1 to 10 micrometers (.mu.m) with a ceramic volume loading of approximately 50%. Commercially available capacitor laminates have a 50 to 100 .mu.m thick dielectric layer.